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Paritosh Pandya (Tata Institute of Fundamental Research, Mumbai)
Date & Time
Mon, 15 May 2017, 15:00 to 16:00
Emmy Noether Seminar Room, ICTS Campus, Bangalore

What are appropriate mathematical models for computing systems? What kind of analysis can be done with such models? These questions have been focus of study by logicians even before the inception of computers. Increasingly, it is recognized that logics and automata form the core mathematical disciplines for modelling and analyzing computing systems. In turn, these logics and automata can themselves be subject to algorithmic analysis. In this talk, we will survey the fascinating world of “formal verification” which investigates programs that analyze, and even construct, other programs from logical specifications.